Electroplating of metals on a substrate is an important process in the manufacture of semiconductor devices. A conventional plating apparatus, known in the art as a "fountain plater," is shown schematically in FIG. 1. A semiconductor wafer 1 is connected to a cathode 2 by contact pieces 3, which hold the edge of the wafer and partially cover the front of the wafer near the edge. The wafer and a consumable anode 4 are immersed in a plating solution. Typically, a fluid flow is established in the plating solution from the anode to the cathode. An electrical circuit including a voltage source V and carrying a current I (also shown schematically in FIG. 1) is established between the cathode and anode. In addition, the cathode and wafer rotate with respect to the anode, to provide improved mass transport to the wafer surface.
In the semiconductor industry, there is a continuing trend to reduce the size of features on a wafer which must be plated. This in turn requires thinner seed layers, particularly in processes such as the "dual damascene" process. A reduced seed layer thickness causes the substrate to become more resistive, and furthermore causes greater nonuniformity in the thickness of the plated metal near point contacts to the wafer. In addition, the problem of nonuniformity of thickness across the wafer (that is, differences in metal deposition rates at different locations on the wafer) is exacerbated when thin plated deposits are required. Excess metal, deposited on field regions of the wafer and not in the features where plating is desired, is removed in a subsequent process. An increase in nonuniformity in the plating process requires an increase in excess metal deposition, leading to longer and more costly post-plating processing.
The use of plating contacts, covering portions of the front of the wafer, results in a number of processing problems. The plating contacts have metal deposited on their surfaces, particularly on the surface 3a exposed to the fluid flow from the anode. The areas of the wafer covered by the contacts are not plated, so that any chips including those areas are lost. In addition, the current density (and hence the metal deposition rate) varies with location on the wafer; the current density typically is higher at the wafer edge near the contacts. This in turn causes a buildup of excess metal on the edge chips, so that these chips suffer from electrical shorts even after the excess has been removed elsewhere on the wafer.
It will be appreciated that the wafer, in contact with the cathode as shown in FIG. 1, is a resistive element in the plating circuit. In particular, the seed layer on the surface of the wafer (on which plating is desired) may be characterized as a network of resistances in which the currents are not necessarily equal, so that the plating current density is non-uniform over the surface of the wafer. As the size of the features to be plated and the thickness of the seed layer both decrease, this non-uniformity is aggravated. Increasing the number of plating contacts improves the uniformity of the current density, but with the undesirable effects noted above.
Other types of plating contacts are well known in the art. For example, U.S. Pat. No. 1,739,657 describes a plating apparatus in which a porous material, soaked with a plating solution, makes contact with a cathodic workpiece. U.S. Pat. No. 5,277,785 describes applying a plating solution to the surface of a workpiece using a plastic brush. In these references, only a portion of the workpiece is contacted at any given time, and the problem of non-uniform current density across the workpiece is not addressed.
There remains a need for a plating apparatus in which the use of conventional wafer-edge plating contacts is avoided, and the uniformity of the plating process is improved. In particular, there is a need for a plating contact arrangement which takes into account the resistive properties of the workpiece, and which permits electrical contact with the entire surface of the workpiece.